ALTERA FPGA´s Architecture & Design

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This course provides all theoretical and practical know-how to design programmable devices of ALTERA with QUARTUS-II design software.
 
The course combines 50% theory with 50% practical work in every meeting.
 
The practical labs cover all the theory and also include practical digital design.
 
The course starts with an overview of the current programmable logic devices and their capabilities, continues with an in-depth study of the architecture and its various features, code writing, using the simulator, synthesizer, and Place & Route toolsThe course also touches upon digital design considerations, adding constraints, integrating IP, timing simulation, FPGA programming, and verification.
 
In addition the course covers the different tools in Quartus II software that assist in design and analysis process.
 
Course Duration : 5 days
1. Become familiar with ALTERA´s FPGA and CPLD families and their capabilities
 
2. Understand the design process from specification up to FPGA programming and final verification on board
 
3. Integrate IP into the design
 
4. Write constraints for clocks, reset, I/O, and exceptions
 
5. Optimize the design through the synthesis and Place & Route tools
 
6. Analyze results and solve design problems
 
7. Program the FPGA and verify functionality
 
8. Understand the coding style considerations for synthesis in ALTERA devices
Hardware engineers who program with VHDL/Verilog languages and would like to be specialized with ALTERA FPGAs and Quartus II software
1. Simulator: Modelsim 
 
2. Synthesizer and Place & Route: Quartus Prime
 
3. Demonstration on ALTERA Evaluation board
 
4. Course book (including labs)
Next course will be held on:

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